Ultrathin wafer level chip size package

The ShellCase wafer-level packaging process uses commercial semiconductor wafer processing equipment. Dies are packaged and encapsulated into separate enclosures while still in wafer form. This wafer level chip size package (WLCSP) process encases the die in a solid die-size glass shell. The glass encapsulation prevents the silicon from being exposed and ensures excellent mechanical and environmental protection. A proprietary compliant polymer layer under the bumps provides on board reliability. Bumps are placed on the individual contact pads, are reflowed, and wafer singulation yields finished packaged devices. This WLCSP fully complies with Joint Electron Device Engineering Council (JEDEC) and surface mount technology (SMT) standards. Such chip scale packages (CSP's) measure 300-700 μm in thickness, a crucial factor for use in various size sensitive electronic products