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低温硅结合离子注入技术制备应变Si材料
引用本文:杨洪东,于奇,王向展,李竞春,宁宁,杨谟华.低温硅结合离子注入技术制备应变Si材料[J].半导体学报,2010,31(6):063001-4.
作者姓名:杨洪东  于奇  王向展  李竞春  宁宁  杨谟华
摘    要:为制作应变硅MOS器件,给出了一种制备具有高表面质量和超薄SiGe虚拟衬底应变Si材料的方法。通过在Si缓冲层与赝晶Si0.8Ge0.2之间设置低温硅(LT-Si)层,由于失配位错限制在LT-Si层中且抑制线位错穿透到Si0.8Ge0.2层,使表面粗糙度均方根值(RMS)为1.02nm,缺陷密度系106cm-2。又经过P+注入和快速热退火,使Si0.8Ge0.2层的应变弛豫度从85.09%增加到96.41%,且弛豫更加均匀。同时,RMS(1.1nm)改变较小,缺陷密度基本没变。由实验结果可见,采用LT-Si层与离子注入相结合的方法,可以制备出满足高性能器件要求的具有高弛豫度、超薄SiGe虚拟衬底的高质量应变Si材料。

关 键 词:离子注入  应变硅  硅技术  材料生长  低温  缺陷密度  表面粗糙度  快速热退火
修稿时间:2/12/2010 5:43:57 PM

Growth of strained-Si material using low-temperature Si combined with ion implantation technology
Yang Hongdong,Yu Qi,Wang Xiangzhan,Li Jingchun,Ning Ning and Yang Mohua.Growth of strained-Si material using low-temperature Si combined with ion implantation technology[J].Chinese Journal of Semiconductors,2010,31(6):063001-4.
Authors:Yang Hongdong  Yu Qi  Wang Xiangzhan  Li Jingchun  Ning Ning and Yang Mohua
Affiliation:State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China;State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology, Chengdu 610054, China
Abstract:In order to fabricate strained-Si MOSFETs, we present a method to prepare strained-Si material with highquality surface and ultra-thin SiGe virtual substrate. By sandwiching a low-temperature Si (LT-Si) layer between a Si buffer and a pseudomorphic Si0.8Ge0.2 layer, the surface roughness root mean square (RMS) is 1.02 nm and the defect density is 1E6 cm-2 owing to the misfit dislocations restricted to the LT-Si layer and the threading dislocations suppressed from penetrating into the Si0.8Ge0.2 layer. By employing PC implantation and rapid thermal annealing, the strain relaxation degree of the Si0.8Ge0.2 layer increases from 85.09% to 96.41% and relaxation is more uniform. Meanwhile, the RMS (1.1 nm) varies a little and the defect density varies little. According to the results, the method of combining an LT-Si layer with ion implantation can prepare high-quality strained-Si material with a high relaxation degree and ultra-thin SiGe virtual substrate to meet the requirements of device applications.
Keywords:low-temperature silicon  strained silicon  ion implantation  SiGe virtual substrate
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