VLSI architecture for digital processing of speech signals

Due to the evolution of increasingly high performantdsp algorithms for bit rate reduction of speech signals in telecommunications,vlsi implementations of these applications are becoming more and more complex. The solutions currently being used for these applications are general purpose digital signal processors or dsp cores which are never fully adapted to the application in terms ofvlsi architecture, i.e. silicon area and power consumption. We propose an alternative to these solutions, based on a parametrable Harvard architecture, and a C compiler which gives an optimized microcode suited to this architecture and to the application. Finally we present two examples of audio applications implemented using this solution.