Low-power on-chip supply voltage conversion scheme forultrahigh-density DRAMs

In order to achieve 3.3-V 1-Gb DRAM and beyond, a new on-chip supply voltage conversion scheme that converts 3.3-V external supply voltage, V_ext, to lowered 1.5-V internal supply voltage, V_ent, without any power loss within the voltage converter is proposed. This scheme connects two identical DRAM circuits in series between V_ixt and V_ss. By operation of two DRAM circuits with the same clock timing, the voltage between two DRAMs, V_int, is automatically fixed to 1/2V_ext. Therefore, each upper and lower DRAM circuit can operate at lowered 1/2V_ext without use of the conventional voltage converter. This scheme was successfully verified by an experimental system using 4-Mb DRAMs. Utilizing the proposed scheme, power dissipation was reduced by as much as 50% and stable operation was achieved without access speed penalty