An algorithm ofk-line location for BBL in LSI/VLSI |
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Authors: | Lu Shengxun Jiang Guojun |
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Affiliation: | (1) Department of Electronic engineering, Hangzhou University, Hangzhou;(2) Department of Information and Electronic Engineering, Zhejiang University, Hangzhou |
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Abstract: | In this paper, aK-line location algorithm for building block cells in LSI/VLSI is presented. When the relative positions of rectangular cells are given, there are 2 states according to the two orientations of a cell. It is proved that to find the optimum solution from the 2N states can be reduced to calculate theN states inK-line algorithm. So the algorithm is shown very effective and can be used with association for cluster method in BBL placement. Under certain conditions, this method can also be used to pesudo BBL placement directly. |
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Keywords: | BBL placement layout of LSI/VLSI CAD |
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