| Design of highly efficient elliptic curve crypto-processor with two multiplications over GF（2^163） |
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| 引用本文： | DAN Yong-ping,ZOU Xue-cheng,LIU Zheng-lin,HAN Yu,YI Li-hua. Design of highly efficient elliptic curve crypto-processor with two multiplications over GF（2^163）[J]. 中国邮电高校学报(英文版), 2009, 16(2): 72-79. DOI: 10.1016/S1005-8885(08)60206-X |
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| 作者姓名： | DAN Yong-ping ZOU Xue-cheng LIU Zheng-lin HAN Yu YI Li-hua |
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| 作者单位： | DAN Yong-ping(The Department of Electric Engineering, Zhongyuan University of Technology, Zhengzhou 450007, China);ZOU Xue-cheng,LIU Zheng-lin,HAN Yu,YI Li-hua(Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430007, China) |
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| 基金项目： | 国家高技术研究发展计划(863计划)，the Research Foundation of Huazhong University of Science and Technology |
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| 摘 要： |
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| 关 键 词： | 密码处理器 标量乘法 椭圆曲线 设计 并行计算 算术逻辑单元 乘法运算 FPGA |
| 收稿时间： | 2008-05-16 |
Design of highly efficient elliptic curve crypto-processor with two multiplications over GF(2163) |
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| DAN Yong-ping,ZOU Xue-cheng,LIU Zheng-lin,HAN Yu,YI Li-hua. Design of highly efficient elliptic curve crypto-processor with two multiplications over GF(2163)[J]. The Journal of China Universities of Posts and Telecommunications, 2009, 16(2): 72-79. DOI: 10.1016/S1005-8885(08)60206-X |
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| Authors: | DAN Yong-ping ZOU Xue-cheng LIU Zheng-lin HAN Yu YI Li-hua |
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| Affiliation: | 1. The Department of Electric Engineering, Zhongyuan University of Technology, Zhengzhou 450007, China;2. Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430007, China |
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| Abstract: | In this article, a parallel hardware processor is presented to compute elliptic curve scalar multiplication in polynomial basis representation. The processor is applicable to the operations of scalar multiplication by using a modular arithmetic logic unit (MALU). The MALU consists of two multiplications, one addition, and one squaring. The two multiplications and the addition or squaring can be computed in parallel. The whole computations of scalar multiplication over GF(2163) can be performed in 3 064 cycles. The simulation results based on Xilinx Virtex2 XC2V6000 FPGAs show that the proposed design can compute random GF(2163) elliptic curve scalar multiplication operations in 31.17 μs, and the resource occupies 3 994 registers and 15 527 LUTs, which indicates that the crypto-processor is suitable for high-performance application. |
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| Keywords: | elliptic curve cryptography scalar multiplication finite field parallel design high performance |
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