Input-Matching and Offset-Cancelling Networks for Limiting Amplifiers in Optical Communication Systems

The diffusion of optical communication systems in the access network and for short-haul datacom applications requires the use of low-cost plastic packages: the functional block most affected is the limiting amplifier, that is often the first stage of the Clock and Data Recovery (CDR) IC. In this paper we illustrate the design issues of the input-matching and offset-cancelling network for a differential limiting amplifier for optical communication systems, with particular emphasis on the effect of bond wires. We discuss the limitations of passive feedback networks when used both for offset suppression and for input matching, and propose a topology that overcomes such limitations by using an active feedback loop. A 50 Ω-loaded differential pair is used to achieve input matching and high offset suppression, and its buffering action desensitizes the input matching from the effect of the bond wires connecting off-chip filtering capacitors. Very good performance even with low cost plastic packages can be achieved by solving the trade-off between power consumption, offset suppression and the value of the low-pass filtering capacitors. Design examples of CDR IC's for 2.5 Gb/s optical systems are presented to compare the proposed topology with solutions based on passive feedback networks. Marco Balsi received the laurea (M.Sc.) degree in 1991 and the dottorato di ricerca (Ph.D.) in 1995 in Electronic Engineering from University of Roma “La Sapienza”, Roma, Italy. Since 1996 he is with “La Sapienza” University as ricercatore (assistant professor). He is engaged in research in nonlinear and soft-computing-based signal processing (especially for biomedical imaging), artificial vision, mechatronics, and anti-personnel mine detection. He has published about 60 paper in international journals and refereed conferences. Francesco Centurelli received the laurea degree (cum laude) and the Ph.D. degree in electronic engineering from the University of Roma “La Sapienza”, Roma, Italy, in 1995 and 2000, respectively. He is currently doing postdoctoral work with the Electronic Engineering Department of the University of Roma “La Sapienza.” His research interests include system-level analysis and design of clock recovery circuits and high-speed analog integrated circuits, with particular emphasis on gigabit-rate optical communication systems. Andrea Pallotta received the M.S. degree in electronic engineering from the University of Ancona, Ancona, Italy. From 1991 to 1999, he was with Italtel, Italy, where he joined several European Community research projects in the field of SDH and WDM fiber-optic transmission systems for both transport and access networks. From 1999 to 2000, he was with Siemens Information and Communication Networks, where he was responsible for the SDH Cross-Connect advanced development group. In September 2000, he joined the STMicroelectronics Company, where he is currently responsible for the electrooptical interface design group. His research interests include GaAs and silicon high-speed ICs, active optical devices, high-speed TX and RX optical modules, and fiber-optic transmission system engineering. Alessandro Trifiletti was born in Roma, Italy, in 1959. In 1991, he joined the Electronic Engineering Department of the University of Roma “La Sapienza” as a Research Assistant and is currently an Assistant Professor. His research interests include high-speed circuit design techniques and III-V device modeling.