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嵌入式系统协同验证环境的设计与实现
引用本文:郭晓东,刘积仁,余克清,王勇峰. 嵌入式系统协同验证环境的设计与实现[J]. 计算机辅助设计与图形学学报, 2000, 12(10): 736-739
作者姓名:郭晓东  刘积仁  余克清  王勇峰
作者单位:东北大学计算机软件国家工程研究中心,沈阳,110006
基金项目:国家“八六三”高技术研究发展计划!(86 3 -3 0 6 -0 1-0 5 )
摘    要:介绍了一个用来验证嵌入式系统硬件/软件,及其交互功能的硬件/软件协同验证环境,硬件/软件功能分别使用系统提供的EHDL语言及ESDL语言设计和描述,该协同验证环境由嵌入式软件调试器和嵌入式硬件模拟器组成,其采用了指令集结构的协同模拟模型,利用该集成环境,硬件/软件的设计错误可以在系统制造之前被发现并修改。

关 键 词:协同验证 嵌入式系统 协同模拟 硬件 软件

Implementation of Co-Verification Environment for Embedded System
GUO Xiao-Dong,LIU Ji-Ren,YU Ke-Qing,WANG Yong-Feng. Implementation of Co-Verification Environment for Embedded System[J]. Journal of Computer-Aided Design & Computer Graphics, 2000, 12(10): 736-739
Authors:GUO Xiao-Dong  LIU Ji-Ren  YU Ke-Qing  WANG Yong-Feng
Abstract:Design and implementation of a hardware/software co verification environment is introduced to verify the correctness of both the hardware and software components of embedded systems as well as the interaction between them. The ESDL language and the EHDL language are defined for hardware and software separately. The co verification environment consists of an embedded software debugger and an embedded hardware simulator. It adopts instruction set architecture co simulation model. With the environment, both hardware errors and software errors can be detected and deleted before fabrication.
Keywords:co-verification   co-simulation   instruction set simulator   discrete event model
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