A new method for integrating analog to digital conversion based on error reduction |
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Authors: | Mohammad Deghat Paknosh Karimaghaee |
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Affiliation: | aDepartment of Electrical Engineering, School of Engineering, Shiraz University, Iran |
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Abstract: | This paper presents a method for eliminating errors of electronic components in integrating analog to digital converters. Offset error in integrator, comparator and amplifiers of dual-slope converter is a great limitation for increasing the resolution of this type of analog to digital converter. The paper proposes an idea that effectively eliminates offset error of integrator and reduces errors of other components. To validate the efficiency of the proposed method, simulation and experimental results are represented in this paper. As a result, this method can potentially allow a cost-effective design of high-resolution ADCs with low performance Op-Amps. |
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Keywords: | Analog to digital converter (ADC) Integrating analog to digital converter (IADC) Dual-slope method Offset error Error control loop |
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