Dynamic back bias CMOS driver for low-voltage applications

A high performance CMOS driver scheme for low-voltage applications is proposed. The threshold voltage of the MOS devices is electrically controlled in order to achieve high-speed operation during the transitions without increasing the static power dissipation. The V_TH control scheme has been applied to the pull-up section of the driver and simulations at 0.9 V and at 50 MHz have shown that the proposed driver exhibits a speed advantage of 40% during pull-up transitions over a conventional CMOS driver, without leading to a serious increase in the power dissipation