| 数字可控正弦信号发生器的设计 |
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| 引用本文： | 王崇羽.数字可控正弦信号发生器的设计[J].数字社区&智能家居,2014(11):7504-7506. |
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| 作者姓名： | 王崇羽 |
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| 作者单位： | 大连大学信息工程学院,辽宁大连11622 |
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| 摘 要： | 该文采用DDS架构设计了可控正弦信号的产生方法。首先分析了数字可控正弦信号的基本原理;其次,采用Verilog HDL语言进行编程,在FPGA平台上进行了仿真及板级调试;最后,在示波器上得到了正确波形。该成果可用作一般信号处理过程的信号发生器,具有科学、准确、易实现,灵活及便携等优点。
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| 关 键 词： | 可控正弦信号 Verilog HDL FPGA |
Design of Digital Controlled Sinusoidal Signal Generator |
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| WANG Chong-yu.Design of Digital Controlled Sinusoidal Signal Generator[J].Digital Community & Smart Home,2014(11):7504-7506. |
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| Authors: | WANG Chong-yu |
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| Affiliation: | WANG Chong-yu (Dalian University of Information Engineering College, Dalian 11622,China) |
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| Abstract: | In this paper, a method of generating controlled sinusoidal signal is designed using the DDS architecture. Firstly, the basic principle of digital controlled sinusoidal signal has been analyzed. Secondly, its programming using Verilog HDL, simulation and board-level debugging come to realization based on FPGA. Finally, the correct waveform has been got on the oscilloscope. Achievements can be used as a signal generator in general signal processing, which has advantages such as scientific, accurate, easy to implement, flexible and portable etc. |
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| Keywords: | controlled sinusoidal signal Verilog HDL FPGA |
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