系统级芯片设计语言和验证语言的发展

由于微电子技术的迅速发展和系统芯片的出现,包含微处理器和存储器甚至模拟电路和射频电路在内的系统芯片的规模日益庞大,复杂度日益增加。人们用传统的模拟方法难以完成设计验证工作,出现了所谓“验证危机”。为了适应这种形势,电子设计和验证工具正在发生迅速而深刻的变革。现在基于RTL级的设计和验证方法必须向系统级的设计和验证方法过渡,导致了验证语言的出现和标准化,本文将对当前出现的系统级设计和验证语言进行全面综述,并论述验证语言标准化的情况。分析他们的优缺点和发展趋势。最后简单评述当前的验证方法,说明基于断言的验证是结合形式化验证和传统模拟验证可行的途径。

Development of Design and Verification Languages for System-on-chip

EDA tools for design and verification are changing rapidly as microelectronics progress and the SoC becomes popular, which contains microprocessors, memories, even analog and RF units , are becoming increasingly complex in function and scale. It is impossible to use traditional tools to finish the verification task of SoC. Thus it comes so called "verification crisis" problem. To meet the problem EDA tools are experienced rapidly and fundamental changes these years. The RTL based design and verification methodologies have to go up to the system level, and have led to advent of the verification languages and their standardization. This paper surveys the development and the trend of design and verification languages, analyses their advantages and disadvantages. Some comments on current verification methods are also given. and the assertion based verification method is emphasized.