Current gain in polysilicon emitter transistors

The common-emitter current gain β in a shallow polysilicon emitter transistor is derived by solving the minority-carrier transport equation in the silicon-polysilicon structure. Coupled With the majority-carrier transport, an equation for the current gain is obtained which depends on the physical properties of the polysilicon as well as the silicon emitter and base doping profiles. The calculations are based on the carrier trapping model proposed in the literature and ignore any minority-carrier recombinations. The model predicts the current gain of a polysilicon emitter transistor increases at low current and high temperature and approaches that of a conventional metal contact transistor at high current and low temperature. This is due to the potential barrier across the grain boundaries, while impeding the majority-carrier flow, inject minority carriers as a bias is developed across the grain boundaries. It also predicts a decrease in cutoff frequency fTdue to minority carriers stored in the polysilicon.