| LMS自适应滤波器FPGA实现的新方法 |
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| 引用本文： | 刘雄飞,高金定,齐海兵.LMS自适应滤波器FPGA实现的新方法[J].压电与声光,2007,29(1):87-89. |
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| 作者姓名： | 刘雄飞 高金定 齐海兵 |
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| 作者单位： | 中南大学,物理学院,湖南长沙,410083 |
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| 摘 要： | 针对用数字信号处理器(DSP)实现的自适应滤波器处理速度低、抗干扰性差和编写底层HDL代码用现场可编程门阵列FPGA实现开发效率低的缺点,该文利用最新DSP Builder工具建立了基于最小均方误差(LMS)算法的8阶二进制频移键控(2FSK)信号去噪自适应滤波器的模型,在EPF10K100EQC208-1器件上设计出了处理速度为36.63 MHz的8阶自适应滤波器,其速度是通过编写底层VHDL代码设计的自适应滤波器7倍,是采用DSP通用处理器TMS320C54X设计的自适应滤波器的25倍。
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| 关 键 词： | LMS算法 自适应滤波器 实现 |
| 文章编号： | 1004-2474(2007)01-0087-03 |
| 修稿时间： | 2005-09-07 |
A New Way on FPGA Implementation of LMS Adaptive Filter |
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| LIU Xiong-fei,GAO Jin-ding,QI Hai-bing.A New Way on FPGA Implementation of LMS Adaptive Filter[J].Piezoelectrics & Acoustooptics,2007,29(1):87-89. |
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| Authors: | LIU Xiong-fei GAO Jin-ding QI Hai-bing |
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| Affiliation: | Physics School of Central South University, Changsha 410083, China |
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| Abstract: | Adaptive filters implemented by programming using DSP processors had a low processing speed and poor antijamming capabilities;also,adaptive filters implemented by FPGA through bottom layer HDL coding had a poor development efficiency.To solve these problems,a model of 8-taps 2FSK noise cancel adaptive filter was established and then simulated using DSP Builder.And an 8 taps adaptive filter with a processing speed of 36.63 MHz was designed out on EPF10K100EQC208-1.This processing speed was more than 7 times faster than which implemented through bottom layer VHDL coding and 25 times faster than which implemented by programming using DSP processor TMS320C54X. |
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| Keywords: | 2FSK DSPBuilder FPGA |
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