CMOS片上电源总线ESD保护结构设计

随着集成电路制造技术的高速发展,特征尺寸越来越小,静电放电对器件可靠性的危害也日益增大,ESD保护电路设计已经成为IC设计中的一个重要部分.讨论了三种常见的CMOS集成电路电源总线ESD保护结构,分析了其电路结构、工作原理和存在的问题,进而提出了一种改进的ESD保护电源总线拓扑结构.运用HSPICE仿真验证了该结构的正确性,并在一款自主芯片中实际使用,ESD测试通过±3 000 V.

Power Bus ESD Protection Structure Design in CMOS IC

With the development of VLSI process,the character dimension is getting smaller and smaller while the damage of electrostatic discharge is markedly increasing in the MOS device reliability,ESD protection circuit becomes an important part of IC design.Three common power bus ESD protection structures in CMOS IC were discussed,the circuit structure and working theories were analyzed,an improved power bus ESD protection structure was put forward.The simulation result with HSPICE proves its correction and the st...