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基于粗粒度数据流架构的稀疏卷积神经网络加速
引用本文:吴欣欣, 欧焱, 李文明, 王达, 张浩, 范东睿. 基于粗粒度数据流架构的稀疏卷积神经网络加速[J]. 计算机研究与发展, 2021, 58(7): 1504-1517. DOI: 10.7544/issn1000-1239.2021.20200112
作者姓名:吴欣欣  欧焱  李文明  王达  张浩  范东睿
作者单位:1.1(计算机体系结构国家重点实验室(中国科学院计算技术研究所) 北京 100190);2.2(中国科学院计算技术研究所 北京 100190);3.3(中国科学院大学计算机科学与技术学院 北京 100049) (wuxinxin@ict.ac.cn)
基金项目:国家自然科学基金项目(61732018,61872335,61802367,61672499);中国科学院战略性先导科技专项(C类)(XDC05000000);中国科学院国际伙伴计划(171111KYSB20170032);计算机体系结构国家重点实验室创新项目(CARCH4408,CARCH4412)
摘    要:卷积神经网络(convolutional neural network, CNN)在图像处理、语音识别、自然语言处理等领域实现了很好的性能.大规模的神经网络模型通常遭遇计算、存储等资源限制,稀疏神经网络的出现有效地缓解了对计算和存储的需求.尽管现有的领域专用加速器能够有效处理稀疏网络,它们通过算法和结构的紧耦合实现高能效,却丧失了结构的灵活性.粗粒度数据流架构通过灵活的指令调度可以实现不同的神经网络应用.基于该架构,密集卷积规则的计算特性使不同通道共享相同的一套指令执行,然而稀疏网络中存在权值稀疏,使得这些指令中存在0值相关的无效指令,而现有的指令执行方式无法自动跳过它们从而产生无效计算.同时在执行不规则的稀疏网络时,现有的指令映射方法造成了计算阵列的负载不均衡.这些问题阻碍了稀疏网络性能的提升.基于不同通道共享一套指令的前提下,根据稀疏网络的数据和指令特征增加指令控制单元实现权值数据中0值相关指令的检测和跳过,同时使用负载均衡的指令映射算法解决稀疏网络中指令执行不均衡问题.实验表明:与密集网络相比稀疏网络实现了平均1.55倍的性能提升和63.77%的能耗减少.同时比GPU(cuSparse)和Cambricon-X实现的稀疏网络分别快2.39倍(Alexnet)、2.28倍(VGG16)和1.14倍(Alexnet)、1.23倍(VGG16).

关 键 词:领域专用加速器  粗粒度数据流  稀疏卷积神经网络  指令映射  指令控制

Acceleration of Sparse Convolutional Neural Network Based on Coarse-Grained Dataflow Architecture
Wu Xinxin, Ou Yan, Li Wenming, Wang Da, Zhang Hao, Fan Dongrui. Acceleration of Sparse Convolutional Neural Network Based on Coarse-Grained Dataflow Architecture[J]. Journal of Computer Research and Development, 2021, 58(7): 1504-1517. DOI: 10.7544/issn1000-1239.2021.20200112
Authors:Wu Xinxin  Ou Yan  Li Wenming  Wang Da  Zhang Hao  Fan Dongrui
Affiliation:1.1(State Key Laboratory of Computer Architecture (Institute of Computing Technology, Chinese Academy of Sciences), Beijing 100190);2.2(Institute of Computing Technology, Chinese Academy of Sciences, Beijing 100190);3.3(School of Computer Science and Technology, University of Chinese Academy of Sciences, Beijing 100049)
Abstract:Convolutional neural network (CNN) achieves good performance in image processing, speech recognition, natural language processing and other fields. Large-scale neural network models often encounter resource constraints such as computing and storage. The emergence of sparse neural networks effectively relieves the need for computing and storage. Although existing domain-specific accelerators can effectively handle sparse networks, they achieve high energy efficiency through tight coupling of algorithms and structures, and lose the flexibility of the structure. The coarse-grained dataflow architecture can implement different neural network applications through flexible instruction scheduling. Based on this architecture, the regular computing characteristics of dense convolution allow different channels to share the same set of instruction to execute. However, there are sparse weights in sparse networks, making these instructions have 0-value-related invalid instructions, which makes the existing instruction execution method cannot automatically skip them, resulting in invalid calculations. At the same time, when executing an irregular sparse network, existing instruction mapping methods cause an unbalanced load on the computing array. These problems hinder the improvement of sparse network performance. In this paper, based on the premise that different channels share a set of instructions, we add an instruction control unit based on the data and instruction characteristics of the sparse network to achieve detection and skipping of 0-value related instructions in the weight data, while using the load balanced instruction mapping algorithm to solve the problem of uneven instruction execution in sparse networks. Experiments show that compared with dense networks, sparse networks achieve an average performance increase of 1.55X and an energy reduction of 63.77%. In addition, it achieves 2.39X(Alexnet), 2.28X(VGG16) and 1.14X(Alexnet), 1.23X(VGG16) speedup over GPU (cuSparse) and Cambricon-X, respectively.
Keywords:domain-specific accelerator  coarse-grained dataflow  sparse convolutional neural network  instruction mapping  instruction control
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