Charge trapping characterization of MOCVD HfO2/p-Si interfaces at cryogenic temperatures |
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Authors: | IP Tyagulskyy IN Osiyuk VS Lysenko AN Nazarov S Hall O Buiu Y Lu R Potter P Chalker |
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Affiliation: | aLashkaryov Institute of Semiconductor Physics NASU, Prospekt Nauki 41, 03028 Kyiv, Ukraine;bDepartment of Electrical Engineering and Electronics, University of Liverpool Brownlow Hill, Liverpool L69 3GJ, United Kingdom;cDepartment of Engineering, University of Liverpool, Brownlow Hill, Liverpool L69 3GH, United Kingdom |
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Abstract: | The paper focuses on the study of charge trapping processes in high-k MOS structures at cryogenic temperatures. It was shown, that there is extremely strong trapping in shallow electron and hole traps, localized in the high-k dielectrics. Concentration of shallow electron traps is as much as 1013 cm−2, while abnormal small capture cross-sections (4.5–8 × 10−24 cm2 for different samples, accordingly) suggests localization of shallow emitting electron traps in transition layer “high-k dielectric/Si”, more, than at the interface. Shallow hole traps with concentration near 1012 cm−2 are separated from silicon valence band with energy barrier in the range 10–39 meV for different samples. |
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