| 一种低功耗结构的ADC设计 |
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| 引用本文： | 高静,姚素英,徐江涛.一种低功耗结构的ADC设计[J].电路与系统学报,2011,16(1):104-107. |
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| 作者姓名： | 高静 姚素英 徐江涛 |
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| 作者单位： | 天津大学,电子信息工程学院,天津,300072 |
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| 基金项目： | 国家自然科学青年基金，国家自然科学基金，天津市科技支撑计划重点项目 |
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| 摘 要： | 逐次逼近结构ADC是中速中高分辨率应用中的常见结构,其中DAC多采用电容阵列结构,但其动态功耗随分辨率的增加而增加.论文设计了一种新颖的10位ADC结构,它采用两级进行模数转换的方法,高位采用低功耗的并行模数转换结构,低位采用逐次逼近模数转换结构,通过合理设计高低位转换位数、低功耗比较器,采用简单的二进制搜索算法,有效...
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| 关 键 词： | 比较器 电容阵列 动态功耗 |
Design of A novel low-power structure ADC |
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| GAO Jing,YAO Su-ying,XU Jiang-tao.Design of A novel low-power structure ADC[J].Journal of Circuits and Systems,2011,16(1):104-107. |
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| Authors: | GAO Jing YAO Su-ying XU Jiang-tao |
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| Affiliation: | GAO Jing,YAO Su-ying,XU Jiang-tao(School of Electronic Information Engineering,Tianjin University,Tianjin 300072,China) |
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| Abstract: | Successive-approximation analog-to-digital converter(SAR ADC) is the most common structure in middle-speed and middle or high-resolution application.The DAC in the ADC usually adopts capacitor-array structure and the dynamic power consumption increases with the improvement of the resolution.A novel structure of 10-bit ADC is proposed in the paper which adopts two-stage converter structure.Parallel architecture is used in coarse converter,while successive-approximation architecture is used in fine converter.... |
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| Keywords: | comparator capacitor array dynamic power consumption |
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