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Sensitivity of single- and double-gate MOS architectures to residual discrete dopant distribution in the channel
Authors:P Dollfus  A Bournel  J E Velázquez
Affiliation:(1) Institut d’Electronique Fondamentale, CNRS UMR 8622, Université Paris-Sud, F-91405 Orsay, France;(2) Departamento de Física Aplicada, Universidad de Salamanca, Pza de la Merced s/n, F-37008 Salamanca, Spain
Abstract:The effect of a single discrete impurity in the channel of Fully-Depleted Single- and Double-Gate MOSFETs is analyzed by means of 3D Monte Carlo simulation. The Double-Gate (DG) architecture appears to be less sensitive to the dopant perturbation than the Single-Gate (SG) counterpart. For an N-channel device the influence of a P-type impurity on the current-voltage characteristics is shown to be strongly dependent on the impurity position in the channel. The maximum current degradation is obtained for an impurity located about 5 nm from the source-end of the channel. The I on reduction reaches 6% in DG and 10.5% in SG. A small current enhancement (less than 2%) is induced by an N-type impurity. These results are analyzed in terms of velocity profile between source and drain.
Keywords:Monte Carlo simulation  MOSFET  Semiconductor device modelling  Doping fluctuations
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