SCR-based ESD protection in nanometer SOI technologies |
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Authors: | Olivier Marichal Geert Wybo Benjamin Van Camp Pieter Vanysacker Bart Keppens |
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Affiliation: | aSarnoff Europe, Brugse Baan 188A, B-8470 Gistel, Belgium |
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Abstract: | This paper introduces an SCR-based ESD protection design for silicon-on-insulator (SOI) technologies. SCR devices or thyristors, as they are sometimes better known, have long since been used in Bulk CMOS to provide very area efficient, high performance ESD protection for a wide variety of circuit applications. The special physical properties and design of an SOI technology however, renders straightforward implementation of an SCR in such technologies impossible. This paper discusses these difficulties and presents an approach to construct efficient SCR devices in SOI. These devices outperform MOS-based ESD protection devices by about four times, attaining roughly the same performance as diodes. Experimental data from two 65 nm and one 130 nm SOI technologies is presented to support this. |
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