Fully monolithic integrated 43 Gbit/s clock and data recoverycircuit in InP HEMT technology |
| |
| Authors: | Murata K. Sano K. Sano E. Sugitani S. Enoki T. |
| |
| Affiliation: | NTT Photonics Labs., Atsugi, Japan; |
| |
| Abstract: | A fully monolithic integrated 43 Gbit/s clock and data recovery circuit for optical fibre communication systems is described. The circuit is based on a phase-locked loop technique, and the input data signal is regenerated with the data-rate clock signal. The circuit was fabricated with 0.1 μm gate-length InAlAs/InGaAs/InP HEMTs, and error-free operation was confirmed for 231-1 PRBS data signal at 43 Gbit/s |
| |
| Keywords: | |
|
|
