一种新的基于晶体管级的电路划分算法

随着VLSI电路规模的不断增加，为实现电路并行仿真所做的电路划分算法的质量显得日益重要。鉴于现有算法未能同时保证均衡的分块间规模和最少的互联信号数目，该文提出了一种新的基于晶体管级的电路划分算法。该算法首先通过一个聚合过程对电路网表进行分割，得到一个比较好的初始分割；然后通过平衡分块间规模差异和进一步优化分块间互连线的数目，最终得到理想的电路划分结果。应用该电路划分算法对工业界的实际电路网表进行测试，结果表明:相比于目前普遍使用的COPART算法，该算法在分块间规模的均衡性方面平均改善了25%，在分块间的互联信号数目方面平均减少了18%。

A Novel Algorithm for Circuit Partitioning at Transistor Level

As the size of VLSI circuits keeps growing, the quality of circuit partitioning for parallel simulation is becoming increasingly crucial. In view of the fact that the present algorithms cannot guarantee the size balance and minimize the cut-signals among partitions simultaneously, a novel algorithm for circuit partitioning at transistor level is presented. The proposed algorithm first conducts clustering procedure to obtain a good initial partition result, and then makes an adjustment procedure to achieve well-balanced partitions with fewer cut-signals. The excellent performance of the new algorithm is demonstrated on several industrial circuits. Compared with the COPART algorithm which is widely used, the size discrepancy among different partitions and the number of cut-signals obtained using the new algorithm decrease by 25% and 18% on average, respectively.