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锁相环频率合成器中的电荷泵设计
引用本文:薛红,李智群,王志功. 锁相环频率合成器中的电荷泵设计[J]. 电子与封装, 2007, 7(9): 15-18
作者姓名:薛红  李智群  王志功
作者单位:东南大学射频与光电集成电路研究所,南京,210096;东南大学射频与光电集成电路研究所,南京,210096;东南大学射频与光电集成电路研究所,南京,210096
基金项目:东南大学射光所与安宇科技合作项目
摘    要:用TSMC 0.18μm CMOS工艺设计了一种电荷泵电路。传统的电荷泵电路中充放电电流有较大的电流失配,文章采用与电源无关的基准电流源电路,运用运算放大器和自偏置高摆幅共源共栅电流镜电路实现了充放电电流的高度匹配。仿真结果表明:电源电压1.8V时,电荷泵电流为0.5mA;在0.3V~1.6V输出电压范围内电流失配小于1μA,功耗为6.8mW。

关 键 词:电流失配  电荷泵  运算放大器  自偏置电流镜
文章编号:1681-1070(2007)09-0015-04
修稿时间:2007-06-07

Charge Pump Design for PLL Synthesizer
XUE Hong,LI Zhi-qun,WANG Zhi-gong. Charge Pump Design for PLL Synthesizer[J]. Electronics & Packaging, 2007, 7(9): 15-18
Authors:XUE Hong  LI Zhi-qun  WANG Zhi-gong
Affiliation:Institute ofRF-and OE-ICs, Southeast University, Nanjing 210096, China
Abstract:A charge-pump circuit which can be used in PLL synthesizer is designed in TSMC 0.181 m CMOS process. Conventional CMOS charge pump circuits have large current mismatch. An operational amplifier and self-biasing cascode current mirror and supply-independent reference current source are used to make charge and discharge current match. Simulation results show that the charge pump current is 0.SmA, the current mismatch is less than 1 Ix A at output voltage range of 0.3V-1.6V, with power consumption of 6.8mW at 1.8V.
Keywords:current mismatch   charge pump   operational amplifier   self-biasing current mirror
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