DDS信号产生电路相位噪声的分析

相位噪声是制约DDS用于高稳定频率源的的关键指标。文中定量给出了DDS内部相位截断误差、幅度量化误差、DAC以及参考时钟源对相位噪声的影响，并着重分析了DDS外围电路对相位噪声的影响，讨论了相位噪声恶化的原因，给出了进行电路设计时需要注意的一些事项，对设计低相噪DDS信号产生电路有很大的帮助。

AnalYSiS of Phase Noise in Signal Generator Based on DDS

Phase noise is the key character in direct digital frequency synthesizers(DDS) applied in the high stable frequency source.In the paper,phase noise generated by the phase truncation,the amplitude quantization,the performance of DAC and the reference clock is analyzed precisely.The effect of DDS peripheral circuit on phase noise is also analyzed.And the reason of phase noise degradation is discussed.The conclusion is useful for low phase noise DDS circuit design.