2D operators on topographic and non‐topographic architectures—implementation,efficiency analysis,and architecture selection methodology |
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Authors: | Ákos Zarándy Csaba Rekeczky |
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Affiliation: | 1. Computer and Automation Research Institute, Hungarian Academy of Sciences, Budapest, Hungary;2. Eutecus Inc, Berkeley, CA, U.S.A. |
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Abstract: | Topographic and non‐topographic image processing architectures and chips, developed within the CNN community recently, are analyzed and compared. It is achieved on a way that the 2D operators are collected to classes according to their implementation methods on the different architectures, and the main implementation parameters of the different operator classes are compared. Based on the results, an efficient architecture selection methodology is formalized. Copyright © 2010 John Wiley & Sons, Ltd. |
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Keywords: | multi‐core processing image processing low power topographic processor arrays non‐topographic processor arrays |
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