基于FPGA的CORDIC算法实现

针对传统CORDIC算法延时大，消耗资源多的缺点，在平行CORDIC算法的基础上提出了一种优化的平行算法，利用二进制转两极算法和微旋转角度编码对低部和高部的旋转方向进行预测，并在高部旋转中利用正反旋转抵消的策略来进一步减少旋转次数，提高运算速度。采用FPGA对提出的算法进行了硬件设计和验证，结果表明，计算迭代次数少,资源消耗少，精度较传统算法来说都有了明显改善。

Implementation of CORDIC algorithm based on FPGA

The delay and resources consumption of traditional cordic algorithm is large. For this reason, an optimized parallel algorithm based on parallel cordic algorithm is proposed, which predicts the rotation direction of the lower part and the high part by using the binary-to-bipolar algorithm and the micro-rotation angle coding, and reduces the rotation times by using positive(negative) rotaion to compensate negative(positive) rotation in the high part rotation so that it improves processing speed. The proposed algorithm is designed and validated by FPGA. The results indicate that the delay and resource consumption are small, and the precision is improved obviously compared with traditional algorithms.