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PCI Express总线高速数据传输测试系统
引用本文:李硕,刘兴春.PCI Express总线高速数据传输测试系统[J].电子测量技术,2013(12):92-94,103.
作者姓名:李硕  刘兴春
作者单位:北京航空航天大学电子信息学院,北京100191
摘    要:介绍了一种高速数据传输测试系统.系统由上位机及本地系统组成.其中,本地系统中使用FPGA产生特定序列,发送信号并接收测试结果;PEX8311芯片完成本地总线与PCI Express总线转换,将测试结果通过PCIExpress总线上传至上位机.上位机中,使用内存映射文件技术实现高速率数据实时存储.详细介绍了PCI Express总线标准及测试系统的组成、FPGA逻辑划分及各部分功能;比较内存映射文件技术与传统储存方式不同,并简述使用方法.通过测试,系统工作稳定,目前已成功应用于测试信号采集.

关 键 词:测试信号采集  PCI  Express  FPGA设计  内存映射文件

High-speed data transmission test system based on PCI Express bus
Li Shuo,Liu Xingchun.High-speed data transmission test system based on PCI Express bus[J].Electronic Measurement Technology,2013(12):92-94,103.
Authors:Li Shuo  Liu Xingchun
Affiliation:( School of Electronics and Information engineering, Beihang University, Beijing 100191, China)
Abstract:A high speed data transmission test system is introduced. The system is consisted of upper computer and local system. The system generates specific test sequences by user's setting, and stores test results in upper computer. In the local system, FPGA generates specific sequences, transmits signals and receives lest results to DUT;PEX8311 transmits the data to upper computer through PCI Express bus. ()n the upper computer side, memory mapping file technique is utilized to promote data storage performance. In this paper, system composition is presented;FPGA logic design and modules' function are discussed in detail. Moreover, the comparison of memory mapping file technique with traditional storage techniques is provided as well as the utilization of memory mapping file. After testing, the system works stably. At present, the system has been used in device test data collection.
Keywords:test data collection  PCI Express  FPGA design  memory mapping file
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