MITA Interleaver for Integrated and Iterative IDMA Systems Over Powerline Channel

Recently, the powerline communication (PLC) mechanism has attracted the attention of researchers across the globe since it demonstrates the least bit error rate in comparison to conventional wireless communication, apart from the merit of no extra cost for implementation of wired communication infrastructure. To make signal transfer over PLC system with no hassling, various multiple access schemes inclusive of Orthogonal Frequency Division Multiple Access (OFDMA), Interleave Division Multiple Access (IDMA) etc. have been employed in the defined communication system. In order to facilitate more reliable communication over PLC channel, the OFDMA and IDMA schemes are combined together, termed as integrated IDMA (IIDMA) scheme. All the variant of IDMA Scheme, inbuilt with interleaving mechanism as its heart, accumulates the merits of original IDMA Scheme in addition to the merits of other multiple access scheme duly coupled with it for intended purpose. In the literature, the researchers have evaluated the IDMA and its variant multiple access schemes with various interleavers, however still there remains scope for improvement in the performance of communication systems with induction of appropriate interleaver. In this paper, a novel interleaver named as Multiplicative Interleaving with Tree Algorithm (MITA) has been implemented over OFDM-IDMA systems and evaluated against existing other interleavers in MATLAB environment. The performance result evidently indicates the superiority of the suggested interleaver in terms of Bit Error Rate (BER), memory consumed and computing complexity. Thus MITA interleaver can be implemented for enhanced performance of the communication system.