使用SIMD协处理器的高性能声码器

近年来，传统的SOC设计方法已无法跟上数据密集型应用的需求。采用了一种面向应用的设计思路，通过添加定制的协处理器和扩展指令集的方式来加速语音编解码算法。选用可配置的LEON-2 RISC软核，并嵌入特别定制的向量乘累加单元来减少运算密集型模块的计算时间，采用不添加新的IP模块的方法改善性能。实验结果表明，对于大量使用乘累加运算的编解码算法，其加速效果最为明显，运算时间平均减少了45%。目前，整个系统已经在Stratix2 EP2S60C5 FPGA上得到了验证，频率50 MHz。

High performance speech vocoder using SIMD coprocessor

In recent years，traditional processors can’t meet the demands of data-intensive applications.An application-oriented method is presented to accelerate the speech coding algorithm，in which a coprocessor with extended instructions has been used as the main architecture.In practical，a vector-like MAC unit has been attached to a configurable LEON-2 RISC core to form a solution to reduce the computational complexity of speech coding algorithm，performance has been improved without designing dedicated hardware blocks.Results show a best improvement of those multiply-accumulation operations，in average，the time has been reduced by 45%.The whole system has been tested and verified on Stratix2 EP2S60C5 FPGA at 50 MHz.