| MPEG-2视频编码器的实现 |
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| 引用本文： | 蔡朝晖,纪涌,林国辉,全子一. MPEG-2视频编码器的实现[J]. 电视技术, 1999, 0(1): 11-14 |
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| 作者姓名： | 蔡朝晖 纪涌 林国辉 全子一 |
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| 作者单位： | 北京邮电大学电信工程学院,100876 |
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| 摘 要： | 图象编码技术经过近４０多年的发展，某些技术已经成为成熟，特别是以离散余弦变换＋运动补偿为代表的一类算法得到广泛的应用和认可，并被许多国际标准所采纳，如ＪＰＥＧ，Ｈ２６１，ＭＰＥＧ－１，ＭＰＥＧ－２等。近年来随着ＶＬＳＩ技术及信息理论的进步，很多复杂算法的实现已成为可能，利用ＲＩＳＣ及ＦＰＧＡ芯片实现ＭＰＥＧ－２标准的ＭＰ＠ＭＬ级的硬件，质量较为理想，为目标码率为６－８Ｍｂｐｓ，可用于数字电视的广播
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| 关 键 词： | 运动检测和运动补偿 率控制 打包 |
Implementation of MPEG-2 video encoder |
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| Chai Zhaohui and Ji Yong et al. Implementation of MPEG-2 video encoder[J]. Ideo Engineering, 1999, 0(1): 11-14 |
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| Authors: | Chai Zhaohui and Ji Yong et al |
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| Affiliation: | Chai Zhaohui and Ji Yong et al |
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| Abstract: | Due to the developments of information theory and DSP technology, many video sequence compression standards have been proposed in recent years, most of which are based on DCT and MC. In this paper introduced is a hardware scheme of MPEG-2 based video encoder which depends on RISC and FPGA technologies. The encoder can tranmit video signals nearly transparently when operating at a target bit rate in the range of 6 to 8 Mbps. It can be used for digital video distribution. |
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| Keywords: | Motion estimation and compensation Rate control Packeting |
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