| AES算法的快速低功耗ASIC实现 |
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| 引用本文： | 周立阳,周玉洁. AES算法的快速低功耗ASIC实现[J]. 信息安全与通信保密, 2007, 0(2): 160-162 |
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| 作者姓名： | 周立阳 周玉洁 |
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| 作者单位： | 上海交通大学信息安全学院,上海,200240 |
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| 摘 要： | 论文根据一种改进的AES密码算法,提出了其低功耗ASIC设计与实现的方法。通过分析CMOS电路功耗产生原因,介绍了动态功耗管理、门控时钟和操作数隔离等低功耗设计方法,给出了该AES密码算法详细的低功耗实现方案。用Power Compiler做功耗分析后发现,优化后的功耗比优化前的功耗降低了43%,满足低功耗的要求。
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| 关 键 词： | AES算法 轮操作 功耗管理 时钟门控 操作数隔离 |
| 文章编号： | 1009-8054(2007)02-0160-03 |
| 修稿时间： | 2006-07-03 |
A Fast Low-power ASIC Implementation of AES Algorithm |
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| ZHOU Liyang,ZHOU Yujie. A Fast Low-power ASIC Implementation of AES Algorithm[J]. China Information Security, 2007, 0(2): 160-162 |
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| Authors: | ZHOU Liyang ZHOU Yujie |
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| Abstract: | An improved AES algorithm was proposed in this paper, and its low-power ASIC design was discussed. By analyzing the source of CMOS circuit's power consumption, a detailed solution which considered several low-power techniques, such as dynamic power management, clock gating and operand isolation, was provided. After estimating with Power Compiler, the power which was optimized could be reduced to 57% of which was not optimized, so the solution can satisfy the requirement of low-power. |
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| Keywords: | AES algorithm round operation power management clock gating operand isolation |
| 本文献已被 CNKI 万方数据 等数据库收录！ |
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