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高输出频率GPS接收机FPGA优化设计
引用本文:李英飞,丁继成,赵琳.高输出频率GPS接收机FPGA优化设计[J].电子技术应用,2011,37(7):26-28.
作者姓名:李英飞  丁继成  赵琳
作者单位:哈尔滨工程大学自动化学院,黑龙江哈尔滨,150001
摘    要:为使DSP芯片有充裕的资源和时间用于复杂的导航计算、输出高频率的解算结果,通过资源优化,只采用FPGA逻辑电路实现了GPS信号的捕获、跟踪、帧同步、卫星自动搜索、伪距信息生成等基带处理功能,并整理了电文、历书、伪距信息、多普勒频移的格式,以方便传输.实验表明,本方案可行有效,定位频率可达100Hz.

关 键 词:相干积分  滤波器调整  帧同步  伪距生成

Optimization of FPGA-based on high-output frequency GPS receiver
Li Yingfei,Ding Jicheng,Zhao Lin.Optimization of FPGA-based on high-output frequency GPS receiver[J].Application of Electronic Technique,2011,37(7):26-28.
Authors:Li Yingfei  Ding Jicheng  Zhao Lin
Abstract:In order that the DSP chip could calculate user position in real time,a real-time GPS module of baseband processing has been implemented on a FPGA,using only logical units.The module implements signal acquisition,track,frame synchronization,satellites auto search and so on.In addition to meeting the demands of the transmission signal to DSP,a auxiliary module is designed for organizing massive messages.Experimental results show that the positioning output frequency more than 100 Hz.
Keywords:coherent integration  filter adjustment  frame synchronization  pseudo generation
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