| 基于FPGA的神经振荡器设计及优化 |
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| 引用本文： | 李啸隽,戴孝亮. 基于FPGA的神经振荡器设计及优化[J]. 电子技术应用, 2011, 37(7): 32-35 |
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| 作者姓名： | 李啸隽 戴孝亮 |
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| 作者单位： | 华南理工大学机械与汽车工程学院机器人实验室,广东广州,510640 |
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| 摘 要： | 为神经振荡器提出了一种高效的FPGA实现方案,介绍了一种改进的分布式算法(DA),以便于最大限度地利用FPGA上的查找表(LUT)资源.整个系统在Matlab/Simulink下采用Altera公司的DSP Builder构建.该方法节约了74％的查找表、75％的寄存器和100％的嵌入式乘法器资源.同时,该方案得到了令...
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| 关 键 词： | 神经振荡器 分布式算法 FPGA 查找表 |
Design and optimization of FPGA-based neural oscillators |
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| Li Xiaojun,Dai Xiaoliang. Design and optimization of FPGA-based neural oscillators[J]. Application of Electronic Technique, 2011, 37(7): 32-35 |
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| Authors: | Li Xiaojun Dai Xiaoliang |
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| Abstract: | This paper studies designing and optimization of neural oscillators on FPGAs.We introduced a revised distributed-arithmetic(DA) algorithm in order to maximize the utilization of look up tables(LUTs) on FPGAs.The entire system is designed under Matlab/Simulink by DSP Builder from Altera.The proposed scheme performances great save in hardware resources.Meanwhile,we've obtained satisfactory experiment results. |
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| Keywords: | neural oscillator distributed arithmetic FPGA look up table |
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