Design and implementation of efficient QCA full-adders using fault-tolerant majority gates |
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| Authors: | Bravo-Montes J A Martín-Toledano A Sánchez-Macián A Ruano O Garcia-Herrero F |
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| Affiliation: | 1.ARIES Research Center, Universidad Antonio de Nebrija, Madrid, 28049, Spain
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| Abstract: | The Journal of Supercomputing - CMOS technology is facing physical limitations in scaling the manufacturing process. Therefore, to deepen the development of better designs in a smaller area, it is... |
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