| 判断逻辑电路冒险的逻辑代数方法 |
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| 引用本文： | 夏文怀.判断逻辑电路冒险的逻辑代数方法[J].辽宁工学院学报,1998,18(2):56-59. |
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| 作者姓名： | 夏文怀 |
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| 作者单位： | 电子工业部第五十三研究所 |
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| 摘 要： | 对用代数方法判断组合逻辑电路在过渡过程中由于逻辑竞争而产生的冒险问题做了较为详尽的分析和论证。
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| 关 键 词： | 时间延迟 逻辑电路 逻辑代数方法 |
The Logical Algebra Method About the Judgement of a Logical Circuit Risk |
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| Xia Wenhuai.The Logical Algebra Method About the Judgement of a Logical Circuit Risk[J].Journal of Liaoning Institute of Technology(Natural Science Edition),1998,18(2):56-59. |
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| Authors: | Xia Wenhuai |
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| Affiliation: | Xia Wenhuai |
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| Abstract: | The paper presents a detail analysis of the risky problems caused due to a logical competition when the algebra method is used to judge the logical circuits in combination during the transit procedures, and reasons out the above mentioned. In the verification, every individual condition is given a visable waveform graph to show there is a possible risk. As a result, the difficulty in understanding this abstractive problem can be made lessened. |
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| Keywords: | time delay critical competition static risk dynamic risk 0-type risk 1-type risk |
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