ASIC集成电路的可测性设计与技术实现

ASIC集成电路设计开发中的隐含逻辑瑕疵与电路故障是芯片实现的最大困境,针对不同特性的电路提出了内部逻辑扫描、存储器内建自测试、边界扫描链插入以及ATPG自动测试向量生成的解决方案与技术方法,实现了SOC设计开发中逻辑与成片电路的主动侦测与跟踪寻径,经实践证明这些方法大大提高了复杂SOC研制的成功率.

Design for Testability and Implement Technology in ASIC Design

The hidden logic flaw and circuit fault are most difficult situation in implementation of ASIC.A comprehensive DFT technique can implement active detection and path tracing in SOC circuit,according to various circuits characteristic.The technique includes inside logic scan,memory built-in self test,boundary scan chain insertion and ATPG.It is proved by practice that the method mentioned above is able to increase the successful probability of developing a complex SOC design enormously.