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集成低功耗CMOS压控振荡器及其二分频器
引用本文:池保勇,石秉学.集成低功耗CMOS压控振荡器及其二分频器[J].半导体学报,2002,23(12):1262-1266.
作者姓名:池保勇  石秉学
作者单位:清华大学微电子学研究所,100084,北京
摘    要:实现了应用于无线局域网收发机的集成低功耗CMOS压控振荡器及其二分频器.压控振荡器是由在片对称螺旋型电感和差分容抗管组成的LC负阻型振荡器,而二分频器采用了ILFD结构.由于采用了差分LC元件和ILFD技术,整个电路的功耗很低.该电路已经用0.18μm CMOS工艺实现.测试结果表明该电路能产生低相位噪声的3.6/1.8GHz双带本振信号,并具有很宽的可控频率范围.当电源电压为1.5V时,该电路消耗了5mA的电流.芯片面积为1.0mm×1.0mm.

关 键 词:压控振荡器  无线局域网收发机  二分频器

Integrated Low-Power CMOS VCO and Its Divide-by-2 Dividers
Chi Baoyong,Shi Bingxue.Integrated Low-Power CMOS VCO and Its Divide-by-2 Dividers[J].Chinese Journal of Semiconductors,2002,23(12):1262-1266.
Authors:Chi Baoyong  Shi Bingxue
Abstract:An integrated low-power CMOS VCO and its divide-by-2 dividers for WLAN transceivers are presented.The VCO is based on on-chip symmetrical spiral inductor and differential diode and the divide-by-2 dividers are based on the ILFD technique.Due to differential LC tanks and ILFD techniques,power consumption is low.The circuit is implemented in a 0.18μm CMOS process.Measurements show the proposed circuit could produce 3.6/1.8GHz dual band LO signals with a wide tuning range and low phase noise.1.8GHz LO signals are quadrature.It consumes 5mA at VDD=1.5V.The size of die area is only 1.0mm×1.0mm.
Keywords:VCO  WLAN transceivers  divide  by  2 divider
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