| 数字锁相技术在逆变器并联系统中的应用 |
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| 引用本文： | 刘爱忠,刘俊华,肖岚. 数字锁相技术在逆变器并联系统中的应用[J]. 电力电子技术, 2007, 41(7): 80-82 |
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| 作者姓名： | 刘爱忠 刘俊华 肖岚 |
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| 作者单位： | 南京航空航天大学,江苏,南京,210016;南京工程高等职业学校,江苏,南京,210016 |
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| 摘 要： | 逆变器并联系统中各模块输出电压的频率、相位应时刻保持一致,这样才能保证并联系统的安全运行.针对输出母线电压频率可变(300～500 Hz)的并联系统,研究了采用TMS320F240型数字信号处理器(DSP)实现锁相的锁相环原理和方法;给出了硬件实现电路及算法流程图.实验结果验证了该方案的可行性和有效性.
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| 关 键 词： | 逆变器 并联 锁相环控制/数字信号处理器 |
| 文章编号： | 1000-100X（2007）07-0080-03 |
| 修稿时间： | 2006-12-12 |
Digital Phase-lock Technology applied to Inverter Parallel System |
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| LIU Ai-zhong,LIU Jun-hua,XIAO Lan. Digital Phase-lock Technology applied to Inverter Parallel System[J]. Power Electronics, 2007, 41(7): 80-82 |
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| Authors: | LIU Ai-zhong LIU Jun-hua XIAO Lan |
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| Abstract: | In order to realize the safe operation of inverter parallel system,the frequency and phase of each module's output voltage should be the same at any moment.The digital phase-locked loop was used for the parallel system whose out-put commom bus voltage frequency is variable.The principle and the technique based on TMS320F240 DSP are studied.Both the pratical circuit and software arithmetic are given.The experimental results prove the scheme is feasible and effective. |
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| Keywords: | inverter parallel phase-locked loop control / digital signal processor |
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