基于Copula理论的芯片多元参数成品率估算方法

当前芯片参数成品率研究主要局限于单一性能指标成品率估算或对多个单性能指标成品率进行均衡优化.针对此类方法易造成参数成品率缺失的问题，本文提出一种基于Copula理论的芯片多元参数成品率估算方法.该方法首先针对漏电功耗及芯片时延性能指标，构建具有随机相关性的漏电功耗及芯片时延模型；然后利用鞍点线抽样方法对漏电功耗及芯片时延的边缘分布概率进行求解；最后根据Copula理论得到准确的芯片多元参数成品率估算结果.仿真结果表明，相较于蒙特卡罗仿真，本文方法具有较高的仿真效率，仿真时间减少了12%以上，而且在不同国际电路与系统研讨会（International Symposium on Circuits and Systems，ISCAS）基准电路下，该方法与蒙特卡罗仿真结果的相对误差均保持在9%以内，能够在任意性能指标约束下，对芯片多元参数成品率进行有效估算，可为芯片设计人员提供同时考虑多个性能指标的参数成品率信息.

A Chip-Level Multi-parametric Yield Prediction Method Based on Copula Theory

The previous approaches on parametric yield prediction are limited to either predicting parametric yield for single performance metric,or balanced optimizing several single-parametric yields.Consequently,these approaches may result in significant yield loss.In order to avoid the deficiency,this paper suggests a copula-based multi-parametric yield prediction method.First,the method models power and timing randomly and correlatively.Then,saddle point line sampling is applied to estimate their marginal distributions.Finally,according to copula theory,the multi-parametric yield is predicted.Experimental results demonstrate that comparing to Monte Carlo (MC) simulation,the proposed method has higher simulation efficiency,the simulation time is reduced by more than 12％.In addition,the relative errors of the results of this method and MC simulation in different ISCAS benchmark circuits are maintained at less than 9 ％,and under arbitrary performance limit,the proposed method can predict multi-parametric yield effectively.It provides the designer with yield information that considers multiple performance metrics simultaneously.