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Drive current boosting of n-type tunnel FET with strained SiGe layer at source
Authors:Nayan Patel  Santanu Mahapatra
Affiliation:Nano Scale Device Research Laboratory, Centre for Electronics Design and Technology, Indian Institute of Science, Bangalore 560012, India
Abstract:Though silicon tunnel field effect transistor (TFET) has attracted attention for sub-60 mV/decade subthreshold swing and very small OFF current (IOFF), its practical application is questionable due to low ON current (ION) and complicated fabrication process steps. In this paper, a new n-type classical-MOSFET-alike tunnel FET architecture is proposed, which offers sub-60 mV/decade subthreshold swing along with a significant improvement in ION. The enhancement in ION is achieved by introducing a thin strained SiGe layer on top of the silicon source. Through 2D simulations it is observed that the device is nearly free from short channel effect (SCE) and its immunity towards drain induced barrier lowering (DIBL) increases with increasing germanium mole fraction. It is also found that the body bias does not change the drive current but after body current gets affected. An ION of View the MathML source and a minimum average subthreshold swing of 13 mV/decade is achieved for 100 nm channel length device with 1.2 V supply voltage and 0.7 Ge mole fraction, while maintaining the IOFF in fA range.
Keywords:Band-to-band tunneling   Subthreshold swing   Gated p-i-n diode   Tunnel field effect transistor (TFET)   Device simulation
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