High-frequency four noise parameters of silicon-on-insulator-basedtechnology MOSFET for the design of low-noise RF integratedcircuits |
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| Authors: | Dambrine G. Raskin J.-P. Danneville F. Vanhoenackel Janvier D. Colinge J.-P. Cappy A. |
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| Affiliation: | Dept. Hyperfrequences et Semicond., IEMN, Villeneuve d'Ascq; |
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| Abstract: | An exhaustive experimental study of the high-frequency noise properties of MOSFET in silicon-on-insulator (SOI) technology is presented. Various gate geometries are fabricated to study the influence of effective channel length, gate finger width, and gate sheet resistivity on the four noise parameters. The high level of MOSFET sensitivity to the minimum noise matching condition is demonstrated. From experimental results, optimal ways to realize ultra low noise amplifiers are discussed. The capability of the fully depleted standard SOI CMOS process for realizing low-noise amplifiers for multigigahertz portable communication systems is shown |
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