| 基于DSP的视频采集压缩卡的实现 |
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| 引用本文： | 王黎明,胡安,刘洁瑜.基于DSP的视频采集压缩卡的实现[J].电视技术,2004(5):82-85. |
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| 作者姓名： | 王黎明 胡安 刘洁瑜 |
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| 作者单位： | 西安交通大学,电子与信息工程学院,陕西,西安,710049;海军工程大学,电气工程系,湖北,武汉,430033 |
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| 摘 要： | 实现了以TI的TMS320C6205 DSP为核心的高速视频PCI采集压缩卡.该系统采用了PHILIP公司最新推出的视频A/D芯片SAA7114H,将模拟电视信号转换成数字信号,同时CPLD控制将数据流写入FIF0或者中断DSP读出FIFO的数据进行压缩处理.最后将压缩过的数据流再经过PCI总线传入PC机,由PC机完成视频解码.详述了CPLD的控制模块.
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| 关 键 词： | 复杂可编程逻辑器件 A/D转换 视频压缩 PCI总线 数字信号处理 |
| 文章编号： | 1002-8692(2004)05-0082-04 |
| 修稿时间： | 2004年3月16日 |
Implement of Video Collection and Compression Block Based on DSP |
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| WANG Li-ming,HU An,LIU Jie-yu.Implement of Video Collection and Compression Block Based on DSP[J].Tv Engineering,2004(5):82-85. |
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| Authors: | WANG Li-ming HU An LIU Jie-yu |
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| Affiliation: | WANG Li-ming1,HU An2,LIU Jie-yu1 |
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| Abstract: | In this paper, a high speed image and video PCI collection and compression block is accomplished based TI Co. TMS320C6205 DSP. In this system, a device A/D-SAA7114H which was lately marketed by Philips Co. is adopted. This device converts analog signals to digital signals. Data stream is writed into FIFO by CPLD command and DSP is interrupted to read in data stream from FIFO. The data is compressed by DSP. At last the data stream compressed is transmitted into PC by PCI bus and is decoded by PC. CPLD control module is introduced completely in this paper. |
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| Keywords: | CPLD A/D conversion video compression PCI bus DSP |
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