High-bandwidth Address Generation Unit

In this paper we present an efficient data fetch circuitry to retrieve several operands from a n-way parallel memory system in a single machine cycle. The proposed address generation unit operates with an improved version of the low-order parallel memory access approach. Our design supports data structures of arbitrary lengths and different odd strides. The experimental results show that our address generation unit is capable of generating eight 32 − bit addresses every 6 ns for different strides when implemented on a VIRTEX-II PRO xc2vp30-7ff1696 FPGA device using only trivial hardware resources.

Georgi N. GaydadjievEmail:

---

Carlo Galuzzi   received the M.Sc. in Mathematics (summa cum laude) from Università Degli Studi di Milano, Italy in 2003. He is currently at the final stage of his Ph.D. in Computer Engineering at TU Delft, The Netherlands. He is a reviewer for more than 20 international conferences and journals. He served as publication chair for many conferences, e.g. MICRO-41, SAMOS 2006-08, DTIS 2007. His research interests include instruction-set extension, hardware-software partitioning and graph theory. Carlo received the best paper award at ARC 2008. Chunyang Gou   was born in Sichuan, China in 1981. He received the Bachelor degree from University of Electronic Science and Technology of China (UESTC), Chengdu, China in 2003 and the MSc degree from Tsinghua University, Beijing, China in 2006. He is currently working towards the Ph.D. in Computer Engineering in the Delft University of Technology, The Netherlands. His research interests include computer architecture in general, with particular emphasis on high-performance memory hierarchies. Humberto Calderón   was born in La Paz, Bolivia, in 1964. He received the M.Sc. degree in Computer Sciences from the ITCR (Costa Rica) in 1997 and the Ph.D. degree in computer engineering from TU Delft, The Netherlands, in 2007. His current research interests include reconfigurable computing, multimedia embedded systems, computer arithmetic, intelligent control and robotics. He currently joined the “Istituto Italiano di Tecnologia in Genova, Italy, as a senior engineer and researcher. Georgi N. Gaydadjiev   was born in Plovdiv, Bulgaria, in 1964. He is currently assistant professor at the Computer Engineering Laboratory, Delft University of Technology, The Netherlands. His research and development industrial experience includes more than 15 years in hardware and software design at System Engineering Ltd. in Pravetz Bulgaria and Pijnenburg Microelectronics and Software B.V. in Vught, the Netherlands. His research interests include: embedded systems design, advanced computer architectures, hardware/software co-design, VLSI design, cryptographic systems and computer systems testing. Georgi has been a member of many conference program committees at different levels, e.g. ISC, ICS, Computing Frontiers, ICCD, HiPC and more. He was program chair of SAMOS in 2006 and was a general chair in 2007. Georgi received the best paper awards at Usenix/SAGE LISA 2006 and WiSTP 2007. He is IEEE and ACM member. Stamatis Vassiliadis   (M’86-SM’92-F’97) was born in Manolates, Samos, Greece 1951. Regrettably, Prof. Vassiliadis deceased in April 2007. He was a chair professor in the Electrical Engineering department of Delft University of Technology (TU Delft), The Netherlands. He had also served in the EE faculties of Cornell University, Ithaca, NY and the State University of New York (S.U.N.Y.), Binghamton, NY. He worked for a decade with IBM where he had been involved in a number of advanced research and development projects. For his work he received numerous awards including 24 publication awards, 15 invention awards and an outstanding innovation award for engineering/scientific hardware design. His 72 USA patents rank him as the top all time IBM inventor. Dr. Vassiliadis received an honorable mention Best Paper award at the ACM/IEEE MICRO25 in 1992 and Best Paper awards in the IEEE CAS (1998, 2001), IEEE ICCD (2001), PDCS (2002) and the best poster award in the IEEE NANO (2005). He is an IEEE and ACM fellow and a member of the Royal Dutch Academy of Science.