首页 | 本学科首页   官方微博 | 高级检索  
     


An efficient architecture for designing reverse converters based on a general three-moduli set
Authors:Amir Sabbagh  Keivan  Omid  Ali
Affiliation:aMicroelectronic Laboratory of Faculty of Electrical and Computer Engineering, Shahid Beheshti University and IAU, Tehran, Iran;bFaculty of Electrical and Computer Engineering, Shahid Beheshti University, Tehran, Iran
Abstract:In this paper, a high-speed, low-cost and efficient design of reverse converter for the general three-moduli set {2α, 2β − 1, 2β + 1} where α < β is presented. The simple proposed architecture consists of a carry save adder (CSA) and a modulo adder. As a result it can be efficiently implemented in VLSI circuits. The values of α and β are set in order to provide the desired dynamic range and also to obtain a balanced moduli set. Based on the above, two new moduli sets {2n+k, 22n − 1, 22n + 1} and {22n−1, 22n+1 − 1, 22n+1 + 1}, which are the special cases of the moduli set {2α, 2β − 1, 2β + 1} are proposed. The reverse converters for these new moduli sets are derived from the proposed general architecture with better performance compared to the other reverse converters for moduli sets with similar dynamic range.
Keywords:Reverse converter  Residue to binary converter  Residue number system (RNS)  Computer arithmetic  New chinese remainder theorem 1 (New CRT-I)
本文献已被 ScienceDirect 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号