一种容错实时计算机体系结构的研究与实现

为满足对安全关键领域日益增长的可靠性需求,通过对容错关键技术和多处理器系统的深入研究,提出了一种基于松耦合多处理器体系结构的双机容错实时嵌入式系统设计方案。该方案无缝整合了计算机硬件级、操作系统级、应用级的容错技术,以达到从整体上提高系统可靠性的目的。然后,利用马尔科夫状态图法对该系统进行了可靠性分析和数值模拟,结果表明该设计方案能显著地从整体上提高系统的可靠性水平。

Design and Implementation of a Fault-Tolerance Real-Time Computer Architecture

Based on fault-tolerance technique and multi-processors system, a fault-tolerance real-time embedded dual system solusion is put forward in this paper. The proposed solusion is based upon the loosely coupled multiprocessors architecture, this architecture seamlessly, integrates the fault-tolerance design techniques of hardware level, operating system level, and application level The system reliability is analyzed by the Markov state diagram The results show that the design scheme can enhance the system reliability remarkably.