Study of novel techniques for reducing self-heating effects in SOI power LDMOS

Self-heating effects in silicon-on-insulator (SOI) power devices have become a serious problem when the active silicon layer thickness is reduced and buried oxide thickness is increased. Hence, if the temperature of the active region rises, the device electrical characteristics can be seriously modified in steady state and transient modes. In order to alleviate the self heating, two novel techniques which lead to a better heat flow from active silicon layer to silicon substrate through the buried oxide layer in SOI power devices are proposed. No significant changes on device electrical characteristics are expected with the inclusion of the novel techniques. The electro-thermal performance of lateral power devices including the proposed techniques is also presented.