A DDS Synthesizer with Digital Time Domain Interpolator

A DDS type circuit structure for producing numericallyprogrammable square wave clock signal is presented. The high speed D/Aconverter needed in conventional DDS systems is replaced by an tap delay line time domain interpolator thateffectively increases the sampling rate by a factor of . Thus the circuit can be used up to full clock rate withoutimage filtering. A prototype IC with clock frequency of 30 MHz, 5 bitinterpolator and SFDR of –40 dBc up to 10 MHz and –33 dBcup to 15 MHz has been designed and tested.