A novel high efficiency low ripple switched-capacitor DC/DC converter

This paper presents a new method to improve light load efficiency and minimize output ripple of switched-capacitor (SC) DC/DC converters. In order to improve light load efficiency, this paper proposes adaptive frequency modulation to scale down gate-drive losses as load current reduces. Adaptive duty cycle modulation is proposed to minimize output ripple as the converter works under different gain hopping mode. Furthermore, this work optimized switching frequency, the dead time of 2-phase non-overlapping clocks and switching transistor size for efficiency enhancement. A new compensation circuit is also proposed to make system stable. A transistor level implementation of the proposed SC converter in Chartered 0.35 μm CMOS process is provided. Measurement results shows: maximum ripple voltage is <8 mV and efficiency is up to 87%.