| 基于FPGA的PCI-64接口设计 |
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| 引用本文： | 何可. 基于FPGA的PCI-64接口设计[J]. 数字社区&智能家居, 2009, 0(16) |
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| 作者姓名： | 何可 |
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| 作者单位： | 中国科学技术大学管理学院; |
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| 摘 要： | 该文介绍一种简捷高效的PCI接口设计方法:使用PCI兆核(MegaCore)逻辑。PCI兆核逻辑与用户接口逻辑绑定在FPGA里,便于仿真和调试,大大缩短了电子工程师的开发周期,减少了成本。在这里我们主要介绍ALTERA的PCI兆核逻辑,特别是pci_mt64兆核逻辑的设计原理、时序分析与设计时需要注意的事项,最后应用于我们的系统--1Gbps64位PCI以太网卡接收器中。
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| 关 键 词： | PCI局部总线 核逻辑 现场可编程逻辑器件 |
FPGA Based PCI-64 Interface Design |
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| HE Ke. FPGA Based PCI-64 Interface Design[J]. Digital Community & Smart Home, 2009, 0(16) |
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| Authors: | HE Ke |
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| Affiliation: | HE Ke (Management School of University of Science , Technology of China,Hefei 230026,China) |
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| Abstract: | This paper introduce a simple and effective way to design PCI interface: PCI CORE. Using the PCI CORE and user logic together,electronic electric engineer can reduce the cost of the development and debug and simulate easilly. Here we will introduce the PCI CORE of the ALTERA company,especially the pci_mt64 logic core. We introduce the principle,timing and attention of the pci_mt64 logic core. Last we use the pci_mt64 logic core in our design system---1Gbps,64bits,PCI ethernet car for receiving the data from... |
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| Keywords: | PCI local bus logic core field programmable gates array |
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