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低电压低功耗CMOS 5Gb/s串行收发器
引用本文:孙烨辉,江立新,秦世才. 低电压低功耗CMOS 5Gb/s串行收发器[J]. 半导体学报, 2007, 28(8): 1283-1288
作者姓名:孙烨辉  江立新  秦世才
作者单位:1. 南开大学信息技术科学学院,天津,300071
2. IDT科技(上海)有限公司,上海,200233
摘    要:设计并实现了一种使用0.13μm CMOS 工艺制造的低电压低功耗串行收发器.它的核心电路工作电压为1V,工作频率范围为2.5~5GHz.发送器包括一个20:1的串行器和一个发送驱动器,其中发送驱动器采用了预加重技术来抵消传输信道对信号的衰减,降低信号的码间串扰.接收器包括一个输入信号预放大器,两个1:20的解串器以及时钟恢复电路.在输入信号预放大器中设计了一个简单新颖的电路,利用前馈均衡来进一步消除信号的码间串扰,提高接收器的灵敏度.测试表明,收发器功耗为127mW/通道.发送器输出信号均方根抖动为4ps.接收器在输入信号眼图闭合0.5UI,信号差分峰-峰值150mV条件下误码率小于10-12.

关 键 词:低电压  低功耗  收发器  均衡
收稿时间:2015-08-18
修稿时间:2007-04-05

A Low Voltage Low Power CMOS 5Gb/s Transceiver
Sun Yehui, Jiang Lixin, Qin Shicai. A Low Voltage Low Power CMOS 5Gb/s Transceiver[J]. Journal of Semiconductors, 2007, In Press. Sun Y H, Jiang L X, Qin S C. A Low Voltage Low Power CMOS 5Gb/s Transceiver[J]. Chin. J. Semicond., 2007, 28(8): 1283.Export: BibTex EndNote
Authors:Sun Yehui  Jiang Lixin  Qin Shicai
Affiliation:College of Information Science and Technology,Nankai University,Tianjin 300071,China;IDT (Shanghai) Co.Ltd.,Shanghai 200233,China;College of Information Science and Technology,Nankai University,Tianjin 300071,China
Abstract:A low voltage and low power SerDes transceiver implemented in 0.13μm CMOS is described.The power supply voltage is 1V,and the operating frequency range is from 2.5 to 5GHz.The transmitter includes a 20∶1 serializer and a transmission driver,the latter of which uses pre-emphasis architecture for channel compensation.The receiver employs two 1∶20 deserializer,an input signal pre-amplifier,and a clock and data recovery circuit.The pre-amplifier employs a novel architecture,consisting of a feed-forward equalizer to cancel ISI.The measured transceiver power consumption is 127mW/channel.The RMS jitter of the transmitter output is 4ps.Test results indicate the receiver BER is less than 1e-12 when the input signal amplitude is 150mV differential peak to peak and the eye closure is 0.5UI.
Keywords:low voltage   low power   transceiver   equalization
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